Synopsys accelerates multi-die designs with industry's first complete hbm3 ip and verification solutions

Mountain view, calif., oct. 7, 2021 /prnewswire/ -- highlights of this announcement: the designware hbm3 controller, phy, and verification ip reduces integration risk and maximizes memory performance in 2.5d multi-die systems low-latency hbm3 controller with flexible configuration options enhance memory bandwidth pre-hardened or configurable hbm3 phy in 5-nm process operates at 7200 mbps for up to 2x the data rate and improves power efficiency by up to 60% compared to hbm2e verification ip and memory models for zebu and haps offer an end-to-end solution for rapid verification closure from ip to soc synopsys' 3dic compiler, an integrated multi-die design and analysis platform, provides a comprehensive hbm3 auto-routing solution for rapid and robust design development synopsys, inc. (nasdaq: snps) today announced the industry's first complete hbm3 ip solution, including controller, phy, and verification ip for 2.5d multi-die package systems.
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