Arteris expands ncore cache coherent interconnect ip to accelerate leading-edge electronics designs

Highlights: -  productive: designed for maximum engineering productivity and time-to-market acceleration for connecting semiconductor ip blocks and sub-systems for arm and risc-v-based designs, accelerating time to results. -  configurable: scales across a mix of fully coherent, io-coherent, non-coherent, memory and peripheral interfaces using a variety of noc topologies, delivering best-in-class architectural flexibility.
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